Mchp zephyr dspic release v5.0 #4
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Highlights: - UART interrupt support - Program memory optimisation - Support for ztest and twister - Context switch refignment - Kernel and thread test cases - Samples support - UART: Echo bot, native tty, passthrough - Blinky - Philosophers - Hello world - Pin control driver - New board support (sdPIC33AK512MPS512) Fixes: - Context switch fixes - System timer fixes - Build fixes Signed-off-by: Muhammed Zamroodh <[email protected]>
Highlights:
* Added support for dsPIC33AK512MPS512
* Fixes for kernel and arch test cases
* Context switching refignments
* Change console to on board USB-UART
* Added satck protection
Fixes:
* Context switch fixes
* System timer fixes
Signed-off-by: Muhammed Zamroodh <[email protected]>
harishagari
reviewed
Oct 17, 2025
| ret = -EINVAL; | ||
| } | ||
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| return 0; |
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shouldnt this return "ret"? this is always returning 0
harishagari
reviewed
Oct 17, 2025
| int ret = 0; | ||
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| for (uint8_t i = 0U; i < pin_cnt; i++) { | ||
| ret = pinctrl_configure_pin(pins[i]); |
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only the last pin result is returned. Should we return on first error or accumulate errors(for debugging purpose)?
harishagari
reviewed
Oct 17, 2025
| key = k_spin_lock(&lock); | ||
| /* If receiver buffer is empty, return -1 */ | ||
| if ((*UxSTA & BIT_RXBE) != 0U) { | ||
| ret_val = -EPERM; |
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is "-EPERM" is the right error code in this case? Isnt ENODATA or EAGAIN more appropriate here?
harishagari
reviewed
Oct 17, 2025
| *tris &= ~BIT(pin); | ||
| } else { | ||
| *tris |= BIT(pin); | ||
| } |
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shouldn't we also configure Open Drain , Weak Pull up , pull down , IOC , Start High etc?
harishagari
reviewed
Oct 17, 2025
| static int dspic_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t pins) | ||
| { | ||
| const struct gpio_dspic_cfg *cfg = dev->config; | ||
| volatile uint16_t *lat = (void *)(cfg->base + LAT_OFFSET); |
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all functions by default returns 0 , is this expected , do we need to add error handling and return appropriate errors?
harishagari
reviewed
Oct 17, 2025
| (2 * DT_INST_PROP(0, prescalar) * CONFIG_SYS_CLOCK_TICKS_PER_SEC)) | ||
| ((sys_clock_hw_cycles_per_sec() + \ | ||
| ((2U * DT_INST_PROP(0, prescalar) * CONFIG_SYS_CLOCK_TICKS_PER_SEC) / 2U)) / \ | ||
| (2U * DT_INST_PROP(0, prescalar) * CONFIG_SYS_CLOCK_TICKS_PER_SEC)) |
harishagari
reviewed
Oct 17, 2025
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| /* Clear the timer interrupt flag status bit*/ | ||
| IFS1bits.T1IF = 0; | ||
| total_cycles = total_cycles + (uint64_t)PR1; |
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interrupt flag clearing is not required?
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